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[dcpu16] / dcpu16.h
1 #ifndef DCPU16_H_3XXIQQG2
2 #define DCPU16_H_3XXIQQG2
3
4 #include <stdlib.h>
5
6 /* the target system's concept of a word */
7 typedef unsigned short DCPU16_WORD;
8
9 /* how much ram the system has */
10 #define DCPU16_RAM 0x10000
11 #define DCPU16_INTERRUPT_QUEUE_SIZE 256
12
13 extern const char * const dcpu16_reg_names[];
14 enum dcpu16_register_indexes {
15 DCPU16_REG_A = 0,
16 DCPU16_REG_B,
17 DCPU16_REG_C,
18 DCPU16_REG_X,
19 DCPU16_REG_Y,
20 DCPU16_REG_Z,
21 DCPU16_REG_I,
22 DCPU16_REG_J,
23 DCPU16_REG_PC,
24 DCPU16_REG_SP,
25 DCPU16_REG_EX,
26 DCPU16_REG_IA,
27 DCPU16_REG__NUM
28 };
29
30 /* we call this sort of function for emitting a readable message */
31 typedef void (dcpu16_msg_cb_t)(unsigned int, char *, ...);
32
33 /* we may emit any of these types of messages */
34 enum dcpu16_msg_type {
35 MSG_ERROR = 0,
36 MSG_INFO,
37 MSG_DEBUG
38 };
39
40 /* update the default message handler */
41 dcpu16_msg_cb_t *dcpu16_msg_set_default(dcpu16_msg_cb_t *);
42
43 /*
44 extern dcpu16_msg_cb_t *dcpu16_msg;
45 */
46
47 /* a self-contained dcpu16 core */
48 struct dcpu16 {
49 dcpu16_msg_cb_t *msg_cb_; /* callback to invoke for messages */
50
51 struct dcpu16_acct_cb *cb_table_; /* list of callbacks to invoke for certain events */
52 size_t cb_table_entries_; /* callback list maintenance */
53 size_t cb_table_allocated_; /* callback list maintenance */
54
55 struct dcpu16_hw *hw_table_; /* list of hardware attached to system */
56 size_t hw_table_entries_; /* hardware list maintenance */
57 size_t hw_table_allocated_; /* hardware list maintenance */
58
59 unsigned long long cycle_; /* number of cycles this core has executed */
60 unsigned int skip_ : 1; /* skip execution of next instruction */
61 unsigned int interrupts_deferred_ : 1; /* queue software interrupts */
62 unsigned int on_fire_ : 1; /* cpu is on fire */
63 DCPU16_WORD reg_work_[2]; /* work registers for holding literal values while decoding instructions */
64 DCPU16_WORD interrupts_[DCPU16_INTERRUPT_QUEUE_SIZE]; /* fifo of pending interrupts */
65 size_t interrupts_head_; /* interrupt queue maintenance */
66 size_t interrupts_tail_; /* interrupt queue maintenance */
67
68 DCPU16_WORD reg[DCPU16_REG__NUM]; /* system registers, a b c x y z i j */
69 DCPU16_WORD ram[DCPU16_RAM]; /* memory */
70 };
71
72 /* these are used for accounting/watchpointing/modules/&c */
73 typedef unsigned int dcpu16_acct_event;
74 typedef void (dcpu16_ev_cb_t)(struct dcpu16 *, dcpu16_acct_event, DCPU16_WORD, void *);
75 #define DCPU16_ACCT_EV_CYCLE (1<<1)
76 #define DCPU16_ACCT_EV_READ (1<<2)
77 #define DCPU16_ACCT_EV_WRITE (1<<3)
78 #define DCPU16_ACCT_EV_REG_READ (1<<4)
79 #define DCPU16_ACCT_EV_REG_WRITE (1<<5)
80 #define DCPU16_ACCT_EV_NOP (1<<6)
81 #define DCPU16_ACCT_EV_RESET (1<<7)
82 struct dcpu16_acct_cb {
83 dcpu16_ev_cb_t *fn; /* call this */
84 void *data; /* also mention this */
85 dcpu16_acct_event mask; /* when (mask & event) is true and */
86 DCPU16_WORD addr_l, /* addr is this or higher and */
87 addr_h; /* addr is this or lower */
88 };
89
90 typedef void (dcpu16_hw_signal_t)(struct dcpu16 *, struct dcpu16_hw *);
91 /* this structure defines a specific instance of this type of 'hardware' */
92 struct dcpu16_hw {
93 struct dcpu16 *vm; /* which system do I belong to */
94 struct dcpu16_hw_module *mod; /* whence I came */
95 void *data; /* per-instance data */
96 };
97
98 /* human-readable text describing hw module control operations, for convenience's sake */
99 struct dcpu16_hw_ctl_cmd {
100 char *command;
101 char *data_in_type;
102 char *data_out_type;
103 char *description;
104 };
105
106 typedef int (dcpu16_hw_data_init_t)(struct dcpu16_hw *, void *);
107 typedef void (dcpu16_hw_data_free_t)(struct dcpu16_hw *);
108 typedef int (dcpu16_hw_ctl_t)(struct dcpu16_hw *, const char *, void *, void *);
109 struct dcpu16_hw_module {
110 char *name_; /* dymo label on front panel */
111
112 DCPU16_WORD id_l;
113 DCPU16_WORD id_h;
114 DCPU16_WORD ver;
115 DCPU16_WORD mfg_l;
116 DCPU16_WORD mfg_h;
117
118 dcpu16_hw_signal_t *hwi; /* hardware interrupt handler */
119 dcpu16_hw_signal_t *cycle; /* cycle tick handler */
120 dcpu16_hw_signal_t *reset; /* reset handler */
121
122 dcpu16_hw_data_init_t *data_init; /* how to allocate a dcpu16_hw instance's data */
123 dcpu16_hw_data_free_t *data_free;
124 dcpu16_hw_ctl_t *ctl;
125 struct dcpu16_hw_ctl_cmd *ctl_cmd;
126 };
127
128 /* update a message handler */
129 dcpu16_msg_cb_t *dcpu16_msg_set(struct dcpu16 *, dcpu16_msg_cb_t *);
130
131 /* instantiate a new core */
132 struct dcpu16 *dcpu16_new(void);
133
134 /* reset a core to initial state */
135 void dcpu16_reset(struct dcpu16 *);
136
137 /* print words in buf as asm */
138 DCPU16_WORD dcpu16_mnemonify_buf(DCPU16_WORD *);
139
140 /* print the instruction at the specified address, returns number of words consumed in decoding */
141 DCPU16_WORD dcpu16_disassemble_print(struct dcpu16 *, DCPU16_WORD);
142
143 /* create and delete 'hardware' objects */
144 struct dcpu16_hw *dcpu16_hw_new(struct dcpu16 *, struct dcpu16_hw_module *, void *);
145 void dcpu16_hw_del(struct dcpu16_hw **);
146
147 /* set options on hardware objects */
148 int dcpu16_hw_ctl(struct dcpu16_hw *, const char *, void *, void *);
149
150 /* register new 'hardware' device with system */
151 int dcpu16_hw_attach(struct dcpu16 *, struct dcpu16_hw *);
152
153 /* register a callback for an accounting event */
154 int dcpu16_acct_add(struct dcpu16 *, dcpu16_acct_event, dcpu16_ev_cb_t *, DCPU16_WORD, DCPU16_WORD, void *);
155
156 /* execute the next instruction */
157 void dcpu16_step(struct dcpu16 *);
158
159 /* release a core */
160 void dcpu16_delete(struct dcpu16 **);
161
162 /* signal hardware interrupt */
163 int dcpu16_interrupt(struct dcpu16 *, DCPU16_WORD);
164
165 /* consume a cycle */
166 void dcpu16_cycle_inc(struct dcpu16 *, unsigned int);
167
168 #endif /* DCPU16_H_3XXIQQG2 */
dcpu16 - an emulator