#ifndef DCPU16_H_3XXIQQG2
#define DCPU16_H_3XXIQQG2
+/* the target system's concept of a word */
typedef unsigned short DCPU16_WORD;
+/* how much ram the system has */
+#define DCPU16_RAM 0x10000
+
+/* a self-contained dcpu16 core */
+struct dcpu16 {
+ unsigned long long cycle; /* number of cycles this core has executed */
+ DCPU16_WORD reg[8]; /* system registers, a b c x y z i j */
+ DCPU16_WORD pc; /* program counter */
+ DCPU16_WORD sp; /* stack pointer */
+ DCPU16_WORD o; /* overflow */
+ unsigned int skip_ : 1; /* skip execution of next instruction */
+ DCPU16_WORD ram[DCPU16_RAM]; /* memory */
+ DCPU16_WORD reg_work_[2]; /* (private) work registers for holding literal values while decoding instructions */
+};
+
+/* instantiate a new core */
+struct dcpu16 *dcpu16_new(void);
+
+/* reset a core to initial state */
+void dcpu16_reset(struct dcpu16 *);
+
+/* print the current state of a core */
+void dcpu16_state_print(struct dcpu16 *);
+
+/* print the contents of ram from second to third argument */
+void dcpu16_dump_ram(struct dcpu16 *, DCPU16_WORD, DCPU16_WORD);
+
+/* print the instruction at the specified address */
+void dcpu16_disassemble_print(struct dcpu16 *, DCPU16_WORD);
+
+
+/* execute the next instruction */
+void dcpu16_step(struct dcpu16 *);
+
+/* release a core */
+void dcpu16_delete(struct dcpu16 **);
+
+/* register callbacks to handle warning and debug messages, default is writing to stderr, may be set to null */
+void dcpu16_warn_cb_set(void (*)(char *, ...));
+void dcpu16_trace_cb_set(void (*)(char *, ...));
+
#endif /* DCPU16_H_3XXIQQG2 */